| 摘要 |
<p>PURPOSE:To form a start-stop synchronization type data conversion circuit where start-stop data is sent in a desired line bit rate higher than the own bit rate and there is no limitation in transmittable data length by providing the 1st and 2nd conversion circuits. CONSTITUTION:A conversion circuit 1, a transmission input control circuit 3 and a transmission output control circuit constitute a transmission section, data 1 being start-stop data is converted into line bit rate data 2 and sent to a reception section via a line. A conversion circuit 2, a reception input control circuit 5 and a reception output control circuit 6 constitute the reception section, the data 2 sent from the tranmission line via the line is reconverted into data 3 being the start-stop data and the result is sent. The transmission section inserts a bit SP for stuff between words of the start-stop data, the result is converted into high-speed synchronizing data and sent, the reception section eliminates the stuff bit SP to recover the start-stop data and the time width is varied by the stop bit SP of each word after the recovery.</p> |
