| 摘要 |
PURPOSE:To shorten the time needed for checking the condition of the logical element of an information processor by providing a scanning control circuit to read the condition of an optional logical element and compare the read data and the data sent from the externals device in an information processor. CONSTITUTION:Plural central processing units (CPU) 10-13 are connected through an SVP bus 1 to a service processor (SVP) 2, and in the central processing unit 10, LSIs 50, 60 and 70 and a scanning control circuit 20 to control the scanning action are provided. The scanning control circuit 20 is connected through an SVP bus 1 and an internal bus 21. Namely, plural information processors are logically connected to the external device through one bus and the external device can simultaneously receive the sent data. The external device instructs all information processors once to compare the condition of optional logical element and the expected value. By receiving this, respective information processors compare the condition of the logical element mutually independently in parallel. |
