| 摘要 |
PURPOSE:To eliminate the influence of temperature, power source, etc., and to detect synchronous fields having no error without any adjustment by counting a write clock signal and deciding the period of each pulse of an MFM modulated signal, and detecting the shortest period and detecting the synchronous fields. CONSTITUTION:The MFM modulated signal 2 is inputted to a rise generating circuit 21, which outputs a leading edge signal 41 to an FF 27 as an input clock; and a delay circuit 22 generates a delay signal 42. A counting circuit 23 is reset with every signal 42 to count the write clock signal 19. Its counted value 43 is sent to decision circuits 24-26 and the circuits 24-26 output signals 44-46 of H while the counted value 43 is 1, 2, or 3. The decision signal 44 is supplied to an FF 30 through an OR gate 29 and when a next delay signal 24 is also supplied, the FF 30 outputs a synchronous field detection signal 16 of H. Then, a detection signal 16 is obtained with the signals 45 and 46.
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