| 摘要 |
PURPOSE:To reduce the memory test time by reading simultaneously and counting erroneous data written on a fail memory having the same address space as that of a memory to be tested while dividing the address space is divided into plural numbers. CONSTITUTION:A reply output of each address of a memory 2 to be tested by a pattern generator 1 and an output of the generator 1 are processed by a logical comparator 3 to detect erroneous data of the memory 2. The defective state is written on a corresponding address of the fail memory 4 having the same space as that of the memory 2. Then memory spaces 4A-4N of a memory 4 split into N by a memory control means 5 are read at the same time and the number of defects is counted by counters 6A-6N and totalized by a totalizing means 9. The memory test time is reduced by adopting the constitution that the divided spaces of the fail memory are read at the same time.
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