发明名称 AD CONVERTING CIRCUIT
摘要 PURPOSE:To obtain an AD converting circuit with low cost and many quantizing level numbers by using a parallel comparison m-bit Ad converter, an m-bit DA converter and a parallel comparison n-bit AD converter so as to constitute a (m+n)-bit AD converting circuit. CONSTITUTION:The parallel comparison AD converter 1 converts an input analog quantity A into an m-bit digital quantity D1, and the DA converter 2 converts the said digital quantity D1 into an analog quantity A'. A divider circuit 3 divides a reference voltage E by the number of quantized level of the converter 1, that is, 2<m>, and a subtractor circuit 4 subtracts an output e=E/2<m> of the divider circuit 3 from the output A'. The parallel conversion AD converter 6 converts the analog quantity A stored in the storage circuit 5 into the n-bit digital quantity by using the said output A' and the output E0 of the subtractor circuit 4. The output D1 of the converter 1 is stored in the high-order m-bit of the register 8 and the output D2 of the converter 6 is stored in the ow-order n-bit. Thus, the (m+n)-bit AD converting circuit is obtained by inexpensive components.
申请公布号 JPS61251234(A) 申请公布日期 1986.11.08
申请号 JP19850091525 申请日期 1985.04.27
申请人 FUJITSU LTD 发明人 TABATA YOSHIO
分类号 H03M1/20 主分类号 H03M1/20
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