发明名称 DATA PROCESSOR
摘要 PURPOSE:To perform various processings in parallel by providing a gate means which controls interrupt signals from plural input means and a scanning means which permits the interrupt from a specific keyboard. CONSTITUTION:When a specific flip flop F is selected through a binary decimal decoder 22 which decodes the output of a counter 21, only one keyboard is connected temporarily. Q-side OR outputs of flip flops F1 and F2 are given to the enable terminal of a timing generating circuit 20 so that the operation is stopped when any keyboard is connected. Consequently, when any keyboard is connected, the circuit 20 stops the operation until the processing is terminated. When the interrupt is terminated, OR outputs are negative, and the circuit 20 is switched to the next state to select a next flip flop. Thus, the input operation most usitable for a program is performed.
申请公布号 JPS61198314(A) 申请公布日期 1986.09.02
申请号 JP19850037437 申请日期 1985.02.28
申请人 CANON INC 发明人 SOMA TSUNENORI
分类号 G06F3/02 主分类号 G06F3/02
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