| 摘要 |
PURPOSE:To test fast arithmetic results, to control the address of next instruc tion and to increase the number of branches of a control memory by separating the field of micro instruction to control an arithmetic circuit so that a fast arithmetic system and a late arithmetic system can be separately obtained. CONSTITUTION:At a control memory branch system address register 1, the address of micro instruction is set, micro instructions A and B are read from control memory CS ways A30 and B31, controlled by a way selecting bit 2 and a late arithmetic system 6 is controlled at a field (b) of a control memory data register 5. The arithmetic results of the arithmetic system 6 are tested at a test circuit 7, the bit 2 is selected at the test results and a multiplexer 4 is controlled. A field (a) to control a fast arithmetic system 6' is provided at the register 5, the arithmetic results of the arithmetic system 6' are obtained, and then, the test is executed at a test circuit 7' and by the test results, the bit of part 11 of the register 1 is controlled. The next instruction address is controlled and the number of branches of the control memory is increased. |
