发明名称 Radar system comprising side-lobe blanking circuit.
摘要 <p>A pulse radar apparatus is provided with a first receiver (4) connected to a directional antenna (3) and a second receiver (13) connected to an omnidirectional antenna (12). The receivers (4, 13) are suitable for reception and processing of long-duration and short-duration radar signals respectively, whereby at least the long-duration signals are frequency-modulated and subjected to pulse compression. The radar apparatus is further provided with a side-lobe blanking circuit (20) and switching means (25, 26). The side-lobe blanking circuit (20) comprises: comparator means (21, 22, 23) for supplying, in response to the long- and short-duration signals of the receivers (4, 13), a first control signal (PCSWP) indicative of the maximum amplitude of the long-duration signals, a second control signal (PCSWP) indicative of the maximum amplitude of the short-duration signals, and a third control signal (PC/PC) to indicate whether the amplitude of the short-duration signals of the first receiver (4) exceeds a given value; and a logic circuit (24) for supplying a switching signal (SWP1) to block the signals from the first receiver (4), said switching signal being dependent on the first (PCSWP) and second (PCSWP) control signals if the third (PC/PC) control signal indicates whether the amplitude of the short-duration signals exceeds said given value.</p>
申请公布号 EP0173360(A1) 申请公布日期 1986.03.05
申请号 EP19850200994 申请日期 1985.06.24
申请人 HOLLANDSE SIGNAALAPPARATEN B.V. 发明人 REITS, BERNARD JOZEF
分类号 G01S7/28;H01Q3/26;(IPC1-7):G01S7/28 主分类号 G01S7/28
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