| 摘要 |
In an integrated circuit arrangement having a digital logic consisting of logic blocks, the logic blocks of which operate at different potential levels, a circuit section is provided which converts logic states present in the form of different discrete potential levels into current values allocated to these logic states which enable a zero-potential-related reading-out of the logic states. Furthermore, an electronic switching stage is provided via which the logic states converted into current values simultaneously also pass to the subsequent logic block and which can be used for dominantly superimposing a higher-frequency test signal on the original signal in order to shorten the measuring time.
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