发明名称 CONTROLLER
摘要 PURPOSE:To use plural input/output control sections by setting a transmission/ reception parameter to a control register in an input/output control section to apply direct memory access from the input/output control section so thereby improving the efficiency of a program. CONSTITUTION:When no bus access exists by direct memory access DMA from an input/output controller 13, the bus access from a microprocessing unit 11 is permitted unconditionally. When the bus access from both the units 13 and 11 exists, the DMA from the units 13, 11 is controlled by a DMA control section 15 so that the DMA can use alternately a common bus 14. Since the transmission/ reception of the DMA is switched by the unit 13, the content of the control register is brought into the ''receiving state'' at a high speed while the unit 13 receives end information transmitted from an I/O circuit 2 in succession to the end of transmission of the data.
申请公布号 JPS60122452(A) 申请公布日期 1985.06.29
申请号 JP19830229418 申请日期 1983.12.05
申请人 FUJITSU KK 发明人 MIYOSHI KENTAROU;NAGAHARA TOYOKAZU
分类号 G05B15/02;G06F13/12;G06F13/28;(IPC1-7):G06F13/28 主分类号 G05B15/02
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