发明名称 DATA TRANSFER CONTROLLING SYSTEM
摘要 PURPOSE:To speed up DMA by making bus occupation exclusion control by a lower unit itself when the lower unit makes DMA through a common bus in interlace mode. CONSTITUTION:Prior controlling mechanism for lower units-1,-2 is not provided in a C-BUS controlling device 12. Instead of it, the lower unit-1 generates a transfer permission signal TA to the lower unit-2 when the unit-1 itself has no data transfer request. When the unit-1 has data transfer request to the lower unit-2, and received the transfer permission signal TA, outputs a C-BUS occupation request signal REQ, and when the transfer permission signal TA becomes off, completes data transfer in specified time.
申请公布号 JPS60558(A) 申请公布日期 1985.01.05
申请号 JP19830108649 申请日期 1983.06.17
申请人 FUJITSU KK 发明人 KOBAYASHI MASAAKI;KAMIDATE MORIHIRO;II TOSHIAKI;KISHINO TAKUMI
分类号 G06F13/37;G06F13/28;(IPC1-7):G06F13/28;H04L11/00 主分类号 G06F13/37
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