发明名称 ELECTRONIC CIRCUIT
摘要 PURPOSE:To obtain a receiver that can reduce external connectors when implementing IC by providing a balancing circuit and converting two output signals obtained from an IF amplifier circuit into a feedback signal. CONSTITUTION:When receiving FM broadcast, an IF signal fH is amplified by an IF amplifier circuit 5 and supplied to an amplifier circuit 21. The circuit 21 is used in common when receiving AM. Output signals V01, V02 are supplied to a detecting circuit 22a and a balancing circuit 23. The circuit 22a consists of a phase shifter, a multiplier and an LFP (all of these are not shown in the figure). Above-mentioned output signals V01, V02 are supplied to the multiplier as they are, and at the same time, supplied to the phase shifter. A signal phase of which is delayed by the phase shifter is supplied to another input terminal of the multiplier. The multiplier multiplies output signals V01, V02 and delayed signals, and converts a signal of vertically symmetric compression wave to a signal of waveform having condensation and rarefaction in one direction. This signal is supplied to the LPF, and original audio signal f0 is obtained.
申请公布号 JPS59207713(A) 申请公布日期 1984.11.24
申请号 JP19830080865 申请日期 1983.05.11
申请人 HITACHI SEISAKUSHO KK 发明人 IENAKA MASANORI
分类号 H03F3/34;H03F3/347 主分类号 H03F3/34
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