发明名称 COUNTER DEVICE
摘要 PURPOSE:To detect a binary output value of a counter by a small number of wirings and elements by connecting only a prescribed output which is not the output of all unit stages, to an input of a detecting gate, in accordance with a binary value to be detected. CONSTITUTION:Total four pieces of each output Q' of FFs 1, 2 and 4 being inverted outputs of all unit stages which becomes a logical level ''0'', and an output Q of an FF6 being a non-inverted output of a unit stage of the most significant bit in the unit stage which becomes a logical level ''1'', for instance, in case when a binary value to be detected is [110100] toward the LSB (the least significant bit) side from the MSB (the most significant bit) side are connected to an input terminal of a detecting gate 16, and FFs 3, 5 are not connected to the detecting gate 16. Also, even in case when an inverted output of the unit stage being nearest to the MSB side among the unit states which become ''1'' in the binary output to be detected, and a non-inverted output of the unit stage which becomes ''0'' in the binary output to be detected are supplied, the same result is obtained.
申请公布号 JPS5986924(A) 申请公布日期 1984.05.19
申请号 JP19820198110 申请日期 1982.11.10
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KUNIHIRA SAIJI;MIZUGUCHI HIROSHI;OOTA YUTAKA;OKADA SHINJI;NAKAMURA MINORU
分类号 H03K23/64;H03K21/08;H03K23/00;H03K23/66 主分类号 H03K23/64
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