| 摘要 |
PURPOSE:To obtain a compound semiconductor FET having a favorably high speed switching property by a method wherein a pair of semiconductor regions are arranged on an active layer interposing a gate electrode between the regions, and ohmic electrodes are provided on the regions thereof. CONSTITUTION:An N type active layer 2 is formed according to Si ion implantation in a semiinsulating GaAs substrate 1, a gate electrode 3 of W3Si3 is formed selectively, and N<+> type epitaxial layers 4 are formed in the regions other than the electrode 3. The layers 4 are formed by sending AsH3+(CH3)3Ga+H2S to a reaction tube together with N2 gas, and vapor phase growth of the layers is performed at the same thickness with the electrode 3. Then after the electrode 3 is etched by plasma using CF4+O2 to ensure the gate reverse withstand voltage, the parts of the N+ type layers 4 other than the parts on the active layer 2 are etched to be removed according to HF+H2O2+H2O using an SiO2 mask. Then ohmic electrodes 5, 6 of AuGe/Au are adhered to the layers 4. According to this construction, ohmic contact resistance of the electrodes and resistance of the semiconductor layer can be reduced applying no influence to size and impurity concentration distribution of the active region under the gate electrode, and the GaAs FET having a favorably high speed switching characteristic can be obtained. |
