HIGH SPEED CMOS COMPARATOR CIRCUIT

摘要

A HIGH SPEED CMOS COMPARATOR CIRCUIT A high speed comparator comprising an operational amplifier and two inverter portions is provided. The output voltage of the operational amplifier biases a control transistor coupled to the first inverter portion which is coupled to the operational amplifier in a closed loop. A stable reference voltage is coupled to an input of the operational amplifier and forces the switch point of the first inverter to be at the reference voltage. If the second inverter portion comprises transistors having the gate dimensions thereof sized the same as the transistors of the first inverter portion, the switch point of the second inverter is also at the reference voltage. The switch point of the fast comparator has thereby been isolated from process and temperature variations.