发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize the lowering of the resistance of each electrode of the semiconductor device of multilayer poly Si structure by a simple process by a method wherein one layer or more of poly Si electrodes are formed, impurity ions are implanted, the whole surface is coated with an insulator, a poly Si wiring is formed to an opening section on an ion implanting layer, the insulator is directionally ion-etched, and a metal or a metallic silicide is pasted selectively on poly Si and the surface of a diffusion layer. CONSTITUTION:A gate insulating film 102, the Si electrode 103, a gate oxide film 104 and a gate electrode 105 are formed on a P type silicon substrate 101. A source and a drain 106 are formed through ion implantation. SiO2 107 is deposited on the whole surface and an opening section 108 is formed to the SiO2, and the surface is etched selectively while leaving only a section 109 as the wiring, to which third layer poly Si is formed, to the whole surface. SiO2 is directional-etched to leave SiO2 only on the side wall section of the poly Si electrode. When a substance such as Pt is thermally annealed to the whole surface, PtSi 110 is formed selectively on the surfaces of poly Si 105, 109 and the surfaces of the source and drain sections 106, and resistance is brought to a small value.
申请公布号 JPS5975646(A) 申请公布日期 1984.04.28
申请号 JP19820186162 申请日期 1982.10.25
申请人 TOSHIBA KK 发明人 SHIBATA SUNAO
分类号 H01L21/3205;(IPC1-7):01L21/88 主分类号 H01L21/3205
代理机构 代理人
主权项
地址