MEMORY CIRCUIT IN WHICH SYSTEMATIC WRITING IS EXECUTED

摘要

An arrangement for use with a radar image display unit which includes a main memory (1) for storing data words at respective addresses, and an input circuit (20) having an output connected to the data input (15) of the main memory and at least one input (22) for receiving input words to be written into the main memory at respective addresses. The arrangement includes a memory (40) having corresponding addresses and a write circuit (45) for writing in these corresponding addresses a predetermined first word when a data word is written into the main memory, and for writing in all other addresses a predetermined second word, under the control of an updating signal. The input circuit includes a control element (50) operative during reading the output of the main memory. Whenever a data word is read from a memory address for which the second word is stored in the corresponding address of the memory (40), an invalidation word is entered into the main memory at this address.