发明名称 System and method for LSI circuit analysis
摘要 A system and method for analysis of circuits which include a large number of circuit elements. Blocks of circuitry which define logical circuit functions such as gates and latches are set up as macromodels. Each macromodel need be represented in its full detail only once. Means are provided to recognize latency, or quiescence, of macromodels so that time may be saved in the circuit analysis when a macromodel is latent.
申请公布号 US4386403(A) 申请公布日期 1983.05.31
申请号 US19790108911 申请日期 1979.12.31
申请人 INTERNATIONAL BUSINESS MACHINES CORP. 发明人 HSIEH, HSUEH Y.;RABBAT, NAGUIB B. G.
分类号 G06F17/50;(IPC1-7):G06F15/20 主分类号 G06F17/50
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