发明名称 FAULT DETECTING METHOD FOR POWER SOURCE FOR COMPUTER SYSTEM
摘要 PURPOSE:To examine an intermittent fault due to a defective logical voltage easily and rapidly, by fetching the defective logical voltage as logging data in a storage device when the voltage is generated. CONSTITUTION:A logical voltage VL outputted from a power source 1 is processed by A-D conversion 2, and the result is stored in a register 5 which has corresponding storage parts through several output terminals. The digitized output signal of the A-D converter 2, on the other hand, is sent to a comparing circuit 3, where it is compared with a prescribed reference voltage inputted from a reference voltage source 4. As a result, when the output signal of the converter 2 is greater or less than the reference voltage value, the comparing circuit 3 sends an error logging trigger signal from its output terminal. This signal is sent to a hose device, which receives it to fetch the logging data, stored in the register 5, in a file storage device.
申请公布号 JPS57106922(A) 申请公布日期 1982.07.03
申请号 JP19800183478 申请日期 1980.12.24
申请人 FUJITSU KK 发明人 KASAI KIKUO;SUZUKI FUMIO
分类号 H02J1/00;G06F1/28;G06F11/00 主分类号 H02J1/00
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