发明名称 CHATTERING PREVENTING CIRCUIT
摘要 PURPOSE:To simplify a circuit and to avoid the generation of noise, by constituting the circuit only with IIL gate circuits. CONSTITUTION:A current flows from a current source 11 of an I<2>L to the input terminal of the 1st I<2>L gate G1 and a capacitor C is charged. When a switch S turned on, the capacitor C is discharged and the input of the gate G1 is at L level. Thus, the output of the I<2>L gate G2 is also at L level, and the output of I<2>L gates G3 and G4 is at L level. With this state, a flip-flop consisting of the gates G3, G4 is set. The chattering when the switch S turns on can be prevented, since the capacitor C maintains the input level of the gate G1. When the switch S turns off, since the input level of the gate G1 is maintained until the capacitor C is charged, the chattering can be prevented.
申请公布号 JPS5797219(A) 申请公布日期 1982.06.16
申请号 JP19800173631 申请日期 1980.12.09
申请人 TOUKOU KK 发明人 NAKAYAMA KOUICHI;NUMANO EIJI
分类号 H01H47/00;H03K5/1254;H03K17/00;H03K17/16 主分类号 H01H47/00
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