发明名称 PATTERN ENLARGING ARITHMETIC DEVICE
摘要 <p>PURPOSE:To obtain a high-speed pattern enlarging arithmetic device by performing one-line processing in parallel by avoiding the overlap arithmetic of adjacent picture elements by performing line-by-line processing by a control part. CONSTITUTION:Controller 5 instructs input-output controller 6 to read the (i)th line of input picture storage part 1 into the (i+1)th lines of processing line picture storage part 3 and circumferential-line storage part 4, and then instructs input-output controller 7 to read the (i-1)th line of output picture storage part 2 into storage part 4. Next, control part 5 instructs OR operator 9 to perform OR between outputs of storage parts 3 and 4 and sends the result to storage part 4. Further, controller 5 instructs controller 7 to transfer the contents of storage part 4 to the (i-1)th line of storage part 2. Next, controller 5 instructs expanding operator 8 to process the contents of storage part 3 and stores the result in storage part 3. Next, it instructs controller 7 to read the (i)th line from storage part 2 to storage part 4 and then performs OR between contents of storage parts 3 and 4 through operator 9 to store the result in storage part 4, thereby storing the contents of storage part 4 in the (i)th line of storage part 2.</p>
申请公布号 JPS56152070(A) 申请公布日期 1981.11.25
申请号 JP19800056637 申请日期 1980.04.25
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUKADA YOUJI
分类号 G06T3/40;G06T3/00 主分类号 G06T3/40
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