发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To prevent the ringing of an output voltage from being generated without increasing the rise time and the fall time of a voltage on a transmission path by constituting a CMOS output buffer of an inverter circuit and an N- channel transistor. CONSTITUTION:A delay device 2 is inserted between the gate of a P-channel transistor 3 and an input terminal 1, and the source and the drain of the P- channel transistor 3 are connected to a power source terminal 5 and an output terminal 13, respectively. The gate, the source, and the drain of the N-channel transistor 4 are connected to the gate of the P-channel transistor 3, a ground terminal 12, and the output terminal 13, respectively. The gate of a P-channel transistor 8 is connected to the input terminal 1 via a capacitor 7, and to the power source terminal 5 via a resister 6, respectively, and the source and the drain of the P-channel transistor 8 are connected to the power source terminal 5 and the output terminal 13, respectively. In such a way, it is possible to prevent the ringing of the output voltage from being generated without increasing the rise time and fall time of an output signal.
申请公布号 JPH01195720(A) 申请公布日期 1989.08.07
申请号 JP19880019988 申请日期 1988.01.30
申请人 NEC CORP 发明人 KOMAKI YURIKO
分类号 H03K17/16;G11B5/64;G11B5/85;G11B5/851;G11B5/858;H03K19/0185;H03K19/0948 主分类号 H03K17/16
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