摘要 |
PURPOSE:To prevent the ringing of an output voltage from being generated without increasing the rise time and the fall time of a voltage on a transmission path by constituting a CMOS output buffer of an inverter circuit and an N- channel transistor. CONSTITUTION:A delay device 2 is inserted between the gate of a P-channel transistor 3 and an input terminal 1, and the source and the drain of the P- channel transistor 3 are connected to a power source terminal 5 and an output terminal 13, respectively. The gate, the source, and the drain of the N-channel transistor 4 are connected to the gate of the P-channel transistor 3, a ground terminal 12, and the output terminal 13, respectively. The gate of a P-channel transistor 8 is connected to the input terminal 1 via a capacitor 7, and to the power source terminal 5 via a resister 6, respectively, and the source and the drain of the P-channel transistor 8 are connected to the power source terminal 5 and the output terminal 13, respectively. In such a way, it is possible to prevent the ringing of the output voltage from being generated without increasing the rise time and fall time of an output signal.
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