| 摘要 |
PURPOSE:To obtain a memory cell available for stable refreshment by increasing the sensitivity of a sense amplifier by previously amplifying a signal from a memory cell until activation. CONSTITUTION:To digit lines connected to nodes 3 and 4 at the side of memory and dummy cells of a sense amplifier forming FF by NMOS transistors Q4 and Q5, NMOS transistors, and capacitors Q13 and Q14, and Q8A, Q15, Q16, and Q9A are connected to hold nodes 1, 5, 3, 4, 8, and 9 at power potential VDD is a precharge period. When clocks P1 and P2 are grounded and clocks (phi1) and (phi2) exceed potential VDD in an activation period, transistors 13-16 turn off. Further, when clock (phi3) decreases above potential VDD, nodes 8 and 9 are held at more than potential VDD through capacitor C8A because transistors Q13 and Q14 are high in impedance. Consequently, the signal of the memory at node 2 is pre-amplified until activation to increase the sensitivity of the sense amplifier, so that a memory cell available for stable refreshment can be obtained. |
