发明名称 MANUFACTURE OF SEMICONDUCTOR MEMORY
摘要 PURPOSE:To ensure prescription of the gate length formed by the upper side with the pattern of the lower side by forming the inter-layer insulator film to be provided between the poly-crystal Si layers composed of the upper and lower sides with the material to which the impurity doped and then diffusing the impurity from the insulator film to the upper-side poly-crystal Si layer. CONSTITUTION:Gate insulator film 2 composed of SiO2 and Si3N4 is coated on P-type Si substrate 1, and 1st poly-crystal Si layer 3 is stacked on the entire surface with covering by PSG film 4 which contains P of about 10 mol.%. Then wide opening 13 and narrow opening 14 are drilled on film 2, and opening 13 is covered with resist film 14. At the same time, P<+>-type isolation region 17 is formed by diffusion within substrate 1 within opening 14. After this, 2nd poly-crystal Si layer 5 is grown on the entire surface, and the impurities in film 4 are diffused into layer 5 through the heat treatment. In this case, impurities are diffused onto film 4 as well as to layer 5 within opening 14 but are not into opening 13, thus forming layer 19. In this way, the entire surface is covered with SiO2 film 20 with the opening provided to layer 19, and then prescribed N<+>-type data line 6 is formed by diffusion.
申请公布号 JPS54139495(A) 申请公布日期 1979.10.29
申请号 JP19780046531 申请日期 1978.04.21
申请人 HITACHI LTD 发明人 ITOU TATSU
分类号 H01L27/10;G11C11/40;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
代理机构 代理人
主权项
地址