发明名称 Bias circuit for complementary transistors
摘要 A monolithic amplifier circuit including a differential stage, a differential-to-single ended converter stage, a bias circuit and complementary push-pull output transistors is disclosed. The bias circuit is comprised of a current supply, two semiconductor bias devices and two current sinks. The junctions of the bias devices are connected in series across the junctions of the complementary output transistors to provide bias and to compensate for temperature and process variations in the output transistors. One of the bias devices and one of the current sinks are connected in one parallel path and the other bias device and the other current sink are connected in another parallel path through which most of the current from the current supply flows. This parallel connection enables utilization of minimum geometry bias devices in addition to facilitating precise and predictable control of the bias voltages and currents.
申请公布号 US4163908(A) 申请公布日期 1979.08.07
申请号 US19770826623 申请日期 1977.08.22
申请人 MOTOROLA INC 发明人 PRICE, JOHN J
分类号 H03F3/30;(IPC1-7):H03K1/00;H03K17/60 主分类号 H03F3/30
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