发明名称 |
MEMORIPATOROORUSHINDANHOSHIKI |
摘要 |
PURPOSE:To prevent such a case where the diagnosis processing is delayed owing to an interruption of execution of a running program, by attaining the normal end of the patrol diagnosis of a memory just by recording an error if occurs during said patrol diagnosis to an exclusive log register. CONSTITUTION:The store data 8 is written to a memory 1 based on an address 7 and the read data 9 is read out of the memory 1. The data 9 undergoes an error check through an error correction code ECC circuit 2. If no error is detected during a patrol diagnosis, the data 9 is stored again as it is. Then the data 9 is stored after correction if a 1-bit error is detected. The data 9 is not stored when a multi-bit error is detected. Here an answer control circuit 6 decides by a patrol signal and the ECC check result 11 whether an access is through in a normal state or an abnormal state. The circuit 6 informs the result of its decision to a CPU. Then the circuit 6 informs a normal end to the CPU even though an ECC error is detected in a patrol diagnosis mode. |
申请公布号 |
JPH0230060(B2) |
申请公布日期 |
1990.07.04 |
申请号 |
JP19850007994 |
申请日期 |
1985.01.19 |
申请人 |
PFU LTD |
发明人 |
KATAKURA OSAMU;UENO TSUTOMU;KAWAMURA MAKOTO |
分类号 |
G06F11/22;G06F11/34;G06F12/16 |
主分类号 |
G06F11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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