发明名称 |
Hierarchically organized random access memory system - is modular and virtually addressed, facilitates reconfiguration and reallocation |
摘要 |
<p>A digital memory is configured as a hierarchical system with at least three levels. The first level consists of a main bus and interfacing for one of more main memory units level bus in each main memory unit with a number of memory frames independently interfaced to each busand the third level consists of a separate third level bus in each memory frame with a number of memory storage blocks independently interfaced to each bus. Virtual addressing is employed in which the whole of each address is decoded in the individual memory block which includes for the purpose software settable registers containing identification numbers.</p> |
申请公布号 |
IT1021331(B) |
申请公布日期 |
1978.01.30 |
申请号 |
IT19740027235 |
申请日期 |
1974.09.12 |
申请人 |
HAWKER SIDDELEY DYNAMICS LTD |
发明人 |
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分类号 |
G11C;(IPC1-7):11C/ |
主分类号 |
G11C |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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