| 摘要 |
A method and apparatus for detecting whether the phase difference between a first and a second signal is constant or not. A Q output and Q output are derived from a set-reset flip-flop circuit by imparting thereto a first and a second trigger pulse which are respectively obtained on the basis of said first and second signals. Subsequently, on the basis of said Q and Q outputs, there are produced two pulse signals the fall portions of which correspond to those of said Q and Q outputs respectively but the rise portions of which are caused to occur while being delayed by a period of time corresponding to the duration of said trigger pulses. Thereafter, there are produced logical products of said first and second pulse signals with respect to said first and second trigger pulses. Thus, it is detected whether the phase difference between said first and second signals is constant or not, according to whether the outputs of said logical products are present or not. |
