发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR UNIT
摘要 <p>PURPOSE:To attempt a tomation of the operation of pellet bonding and wire bonding by locating and erecting the sigid and flat lead fram under the condition that it is adhered onto the plane erection table.</p>
申请公布号 JPS5216976(A) 申请公布日期 1977.02.08
申请号 JP19750091919 申请日期 1975.07.30
申请人 HITACHI LTD 发明人 IKEDA YASUHIKO;ITOU OSAMU;ARAI FUMIO;SATOU TAKEO
分类号 H01L23/50;H01L21/56;H01L21/58 主分类号 H01L23/50
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