High Voltage Lateral DMOS Transistor with Optimized Source-Side Blocking Capability

摘要

An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain diffused link, a channel diffused link, and an isolation link which electrically isolated the source, where the isolation diffused link is formed by implanting through segmented areas to dilute the doping to less than two-thirds the doping in the drain diffused link.

主权项

1. A method of forming an integrated circuit, comprising:
receiving a semiconductor wafer having a substrate of a first conductivity type, a buried drift region of a second conductivity type formed in the substrate, and an epitaxial layer of the first conductivity type grown on the buried drift region, wherein the second conductivity type opposing the first conductivity type; applying a link ion implant mask over the epitaxial layer, the link ion implant mask defining a drain open area over a drain portion of the buried drift region, a channel open area over a channel portion of the buried drift region and spaced apart from the drain open area; and implanting dopants through the drain open area and the channel open area onto the epitaxial layer to form a drain link implanted region and a channel link implanted region spaced apart from the drain link implanted region.