| 摘要 |
A switching regulator, has first and second switching regulator units, and first and second PLL circuit units that are provided in the first and second switching regulator units respectively, input first and second control pulse signals (PIN 1 , PIN 2 ) respectively, phases of which are shifted from each other, and control the first timing (T 1 ) of performing non-conduction control on the first switching element (LMOS). The first and second control pulse signals each is controlled to have a frequency corresponding to a voltage-boosted level of the output terminal to maintain the output voltage at predetermined voltage.
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