| 摘要 |
<p>PURPOSE:To accelerate processing speed in the case of enlarging image data at a high magnification and transferring them to a printer. CONSTITUTION:This processor is provided with an address generator for generating a read address to an image memory, pixel density conversion circuit 62 for enlarging/reducing image data, printer interface circuit 61 for transferring the image data enlarged/reduced by the pixel density conversion circuit 62 to a printer 9, and variable frequency oscillation circuit 63 which can change a clock frequency for generating a video clock (a) for image data transfer to the printer interface circuit 61. The image data are enlarged in a main scanning direction at the much higher magnification by setting the clock frequency corresponding to the target magnification of enlargement and transferring the image data enlarged by the pixel density conversion circuit 62 to the printer 9 based on the clock, and image data are enlarged in a sub scanning direction at the much higher magnification, as well by generating the same address from the address generator continuously several times corresponding to the target magnification of enlargement.</p> |
