发明名称 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor package that reduces the characteristic impedance, and to provide a manufacturing method capable of easily manufacturing the semiconductor package. <P>SOLUTION: The semiconductor package 10 adopts a configuration that a conductor layer 9 is formed between a wafer 3 and a re-wiring layer 5, thereby forming a microstrip line structure wherein the conductor layer 9 and the re-wiring layer 5 are placed in opposition to each other via an insulation layer 42. Further, the manufacturing method of the semiconductor package 10 adopts a configuration of sequentially forming a first insulation layer 41, the conductor layer 9, the second insulation layer 42, the re-wiring layer 5, a seal resin layer 7, a first post 61 connected to the conductor layer 9, and a second post 62 connected to the re-wiring layer 5 on the wafer 3 by the wafer level CSP. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004266117(A) 申请公布日期 2004.09.24
申请号 JP20030055509 申请日期 2003.03.03
申请人 FUJIKURA LTD 发明人 SATO MASAKAZU;ITO TATSUYA;NOGUCHI HIDETO
分类号 H01L23/12 主分类号 H01L23/12
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