发明名称 Word-line deficiency detection method for semiconductor memory device
摘要 A semiconductor memory device having a burn-in test capability. The semiconductor memory device includes a detection circuit, which is connected to the plurality of word lines. The detection circuit detects whether a stress voltage for a burn-in test has been applied to all of the word lines along their entire lengths in the burn-in test.
申请公布号 US6839293(B2) 申请公布日期 2005.01.04
申请号 US20020288461 申请日期 2002.11.06
申请人 FUJITSU LIMITED 发明人 KAWAMOTO SATORU;MIZUTANI MOTOKI;NAGAI SHINJI;KATO YOSHIHARU
分类号 G01R31/26;G01R31/28;G11C11/401;G11C29/02;G11C29/04;G11C29/06;G11C29/50;(IPC1-7):G11C29/00;G11C7/00 主分类号 G01R31/26
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