Semiconductor structure including a split gate nonvolatile memory cell and a high voltage transistor, and method for the formation thereof

摘要

A semiconductor structure includes a split gate nonvolatile memory cell and a high voltage transistor. The nonvolatile memory cell includes an active region, a nonvolatile memory stack provided above the active region, a control gate electrode provided above the memory stack, a select gate electrode at least partially provided above the active region adjacent to the memory stack and a select gate insulation layer. The high voltage transistor includes an active region, a gate electrode and a gate insulation layer provided between the active region and the gate electrode. The select gate insulation layer of the nonvolatile memory device and the gate insulation layer of the high voltage transistor are at least partially formed of a same high-k dielectric material. The select gate electrode of the nonvolatile memory device and the gate electrode of the high voltage transistor are at least partially formed of a same metal.

主权项

1. A method, comprising:
providing a semiconductor structure; forming a first well region in said semiconductor structure; forming a second well region in said semiconductor structure; forming a nonvolatile memory stack and a control gate electrode above said first well region; forming a first layer of dielectric material over said semiconductor structure and removing a first portion of said first layer of dielectric material above a location of said first well region, wherein a second portion of said first layer of dielectric material over a location of said second well region is not removed; after removing said first portion of said first layer of dielectric material, forming one or more electrically insulating layers over said semiconductor structure, wherein at least one of said electrically insulating layers comprises a high-k dielectric material; after the formation of said one or more electrically insulating layers, forming one or more electrically conductive layers over said semiconductor structure, wherein at least one of said one or more electrically conductive layers comprises a metal; forming a select gate insulation layer and a select gate electrode that are provided at least partially above said first well region adjacent to said nonvolatile memory stack; and forming a transistor gate insulation layer and a transistor gate electrode above said second well region; wherein said select gate insulation layer is at least partially formed from said one or more electrically insulating layers, said transistor gate insulation layer is at least partially formed from said second portion of said first layer of dielectric material and said one or more electrically insulating layers; and wherein said select gate electrode and said transistor gate electrode are at least partially formed from said one or more electrically conductive layers.