发明名称 METHOD AND CIRCUIT FOR QC-LDPC CODES IN NAND FLASH MEMORY
摘要 The present invention relates to a method and a circuit for creating a quasi-cyclic low-density parity-check (QC-LDPC) code in a NAND flash memory. The method for creating a QC-LDPC code in a NAND flash memory comprises: a step of initializing internal information and external information in response to a range of a parity-check matrix depending on a redundancy extension step; a step of refreshing the external information; a step of determining each bit of a code word; and a step of determining whether to extending a decoding step depending on a parity-check result of a code word, thereby the present invention can raise an error correction rate by increasing a size of redundancy, and extend a lifetime of a NAND flash memory by raising the error correction rate.
申请公布号 KR20160110788(A) 申请公布日期 2016.09.22
申请号 KR20150034564 申请日期 2015.03.12
申请人 HANBAT NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION 发明人 YI, HYUN BEAN;KANG, TAE GEUN
分类号 G11C29/42;G11C29/00;G11C29/10;G11C29/24;H03M13/11 主分类号 G11C29/42
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