| 摘要 |
A new adaptive pixel architecture, folded-multiple-capture (FMC), integrates synchronous self-reset and multiple capture schemes and advantageously eliminates the requirement of a high-frame-rate sensor array, which is essential for conventional image sensors with high dynamic range. The FMC comprises a per-pixel analog-front-end (AFE), a fine analog-digital convertor (ADC) stage, and a digital-signal-processor/controller (DSPC) stage. The AFE performs programmable gain control, synchronous self-reset, sample-and-hold, and enables disturbance detection. In the AFE, a comparator compares an integrator output with a threshold voltage and produces a binary sequence accordingly. The ADC utilizes the binary sequence and the folded multiple capture signals to estimate photocurrent. An image sensor embodying the present invention adapts integration time to signal level, has minimal per-pixel hardware requirement, provides a very high dynamic range, about 120 dB or more, at high speed, about 1,000 frames/s or more, detects and corrects subframe disturbances, and consumes significantly less power.
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