发明名称 Integrated circuits, standard cells, and methods for generating a layout of an integrated circuit
摘要 An integrated circuit according to an embodiment of the invention includes a substrate having a first cell and a second cell, the first and the second cells being adapted to perform a substantially same functionality. Corresponding functional structures of the first and the second cell are electrically connected, at different locations inside the standard cells, to information carrying signal interconnection lines, wherein the functional structures are adapted to serve as an information carrying signal input or as an information carrying signal output.
申请公布号 US9412730(B2) 申请公布日期 2016.08.09
申请号 US201314096980 申请日期 2013.12.04
申请人 Polaris Innovations Limited 发明人 Wagner Michael
分类号 G06F17/50;H01L27/02;H01L27/092;H01L27/118 主分类号 G06F17/50
代理机构 Cozen O'Connor 代理人 Cozen O'Connor
主权项 1. An integrated circuit comprising: a substrate having a first cell and a second cell, the first and the second cells configured to perform a substantially same functionality, wherein corresponding functional structures of the first and the second cell are electrically connected, at different locations inside the standard cells, to information carrying signal interconnection lines, wherein the functional structures are configured to serve as an information carrying signal input or as an information carrying signal output, wherein the integrated circuit comprises a plurality of cells, the first cell and the second cell being comprised in the plurality of cells, and wherein the cells of the plurality of cells are arranged in rows along an extension direction, wherein the cells of the plurality of cells comprise a first and a second power supply rail portion, such that a first power supply rail and a second power supply rail extends along the extension direction in a row, wherein at least half the signal interconnection lines connected to one of said cells are connected to the functional structures of the one of said cell outside an area enclosed by the first and the second power supply rail portions.
地址 Dublin IE