发明名称 |
Semiconductor device and method for fabricating a semiconductor device |
摘要 |
A semiconductor device is disclosed. In one embodiment, the semiconductor device includes two different semiconductor materials. The two semiconductor materials are arranged adjacent one another in a common plane. |
申请公布号 |
US9502421(B2) |
申请公布日期 |
2016.11.22 |
申请号 |
US201414574982 |
申请日期 |
2014.12.18 |
申请人 |
Infineon Technologies Austria AG |
发明人 |
Hirler Franz;Meiser Andreas |
分类号 |
H01L27/06;H01L27/095;H01L21/8258;H01L29/778;H01L29/04;H01L29/16;H01L29/20;H01L21/762;H01L21/265;H01L27/092;H01L29/201;H01L29/205;H01L29/78 |
主分类号 |
H01L27/06 |
代理机构 |
Dicke, Billig & Czaja, PLLC |
代理人 |
Dicke, Billig & Czaja, PLLC |
主权项 |
1. A method, comprising:
providing a substrate having a surface capable of sustaining epitaxial growth of a III-V semiconductor; applying a <100> silicon layer to the substrate; removing portions of the <100> silicon layer and revealing the surface of the substrate in a first region and producing a second region comprising <100> silicon; epitaxially growing a III-V semiconductor on the surface of the substrate in the first region; fabricating a HEMT structure in the first region; fabricating a CMOS device in the second region; depositing a dielectric layer over the first region and the second region; removing portions of the dielectric layer positioned over the first region and the second region and producing through holes exposing contact regions of the first region and the second region; depositing an electrically conductive material in the through holes; depositing an electrically conductive material onto the dielectric layer and the electrically conductive material in the through holes; and removing portions of the substrate under the first region and exposing the III-V semiconductor. |
地址 |
Villach AT |