发明名称 |
Solid-state imaging device and manufacturing method therefor |
摘要 |
A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion. |
申请公布号 |
US9450012(B2) |
申请公布日期 |
2016.09.20 |
申请号 |
US201414555352 |
申请日期 |
2014.11.26 |
申请人 |
CANON KABUSHIKI KAISHA |
发明人 |
Shimotsusa Mineo;Inui Fumihiro |
分类号 |
H01L27/148;H01L27/146 |
主分类号 |
H01L27/148 |
代理机构 |
Canon USA, Inc. IP Division |
代理人 |
Canon USA, Inc. IP Division |
主权项 |
1. A solid-state imaging device comprising:
a plurality of pixels, the pixel including a photoelectric conversion unit, a floating diffusion region, an amplifying transistor configured to output a signal based on an amount of electric charge generated by the photoelectric conversion unit, and a resetting transistor configured to reset an input node of the amplifying transistor; a first substrate; and a second substrate, wherein a first insulating film is provided on a first principal surface of the first substrate, wherein the first substrate includes a first pixel region; wherein a plurality of photoelectric conversion units are arranged in the first pixel region; wherein a first element isolation portion is provided in the first pixel region, configured to electrically isolate the plurality of photoelectric conversion units; wherein a second insulating film is provided on the second substrate; wherein the second substrate includes a second pixel region; wherein a plurality of the amplifying transistors and a plurality of the resetting transistors are arranged in the second pixel region; wherein a second element isolation portion is provided in the second pixel region, configured to electrically isolate at least a part of the plurality of the amplifying transistors and at least a part of the plurality of the resetting transistors; wherein an interface of a region where the first element isolation portion is provided, between the first substrate and the first insulating film, is arranged at a first depth with respect to an interface of a region where the photoelectric conversion unit is arranged, between the first substrate and the first insulating film; wherein an interface of a region where the second element isolation portion is provided, between the second substrate and the second insulating film, is arranged at a second depth with respect to an interface of a region where the amplifying transistor is arranged, between the second substrate and the second insulating film; and wherein the first depth is shallower than the second depth. |
地址 |
Tokyo JP |