| 摘要 |
A content addressable memory cell capable of maintaining static characteristics based on SRAM(Static Random Access Memory) is provided to improve layout of a cell array by using 3-bit SRAM. A content addressable memory half cell(100) comprises a complementary type bit line pair(BL, /BL), a word line(WL), a search line(SL), a match line(ML), inverter transistors(P1, N1, P2, N2), and p-channel access devices(P3, P4). The inverter transistor(P2) is connected between a positive supply power source(102) and a first node(104). The inverter transistor(N2) is connected between the first node and a ground(106). The inverter transistor(P1) is connected between the positive supply power source and a second node(108). The inverter transistor(N1) is connected between the second node and the ground. The first node is connected to the complementary type bit line(BL) through the access device(P3). The second node is connected to the complementary type bit line(/BL) through the access device(P4).
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