| 发明名称 | Reference circuit to compensate for PVT variations in single-ended sense amplifiers | ||
| 摘要 | The disclosure relates to semiconductor memory devices and related methods. A semiconductor memory device comprises: a single-ended sense amplifier circuit for reading data sensed from selected memory cells in a memory array, the sense amplifier having a first node used to feed in a reference signal, a second node coupled to a bit line, and sense transistors responsible for amplifying the content of a selected memory cell during a sense operation, a reference circuit having replica transistors of the sense transistors and further comprising a regulation network designed so that each replica transistor operates in a stable operating point, and wherein the regulation network generates a control voltage that is applied to the sense amplifier circuit. | ||
| 申请公布号 | US9478275(B2) | 申请公布日期 | 2016.10.25 |
| 申请号 | US201314434579 | 申请日期 | 2013.10.10 |
| 申请人 | SOITEC | 发明人 | Thewes Roland |
| 分类号 | G11C7/02;G11C11/4091;G11C5/14;G11C7/06 | 主分类号 | G11C7/02 |
| 代理机构 | TraskBritt | 代理人 | TraskBritt |
| 主权项 | 1. A semiconductor memory device comprising: a single-ended sense amplifier circuit for reading data sensed from selected memory cells in a memory array, the sense amplifier having a first node used to feed in a reference signal, a second node coupled to a bit line, and sense transistors responsible for amplifying the content of a selected memory cell during a sense operation; and a reference circuit having replica transistors of the sense transistors and further comprising a regulation network designed so that each replica transistor operates in a stable operating point, and wherein the regulation network generates a control voltage that is applied to the sense amplifier circuit. | ||
| 地址 | Bernin FR | ||