APPARATUS AND METHOD FOR BUFFERED INTERCONNECT

摘要

There is provided an interconnect for transferring requests between ports in which the ports include both source ports destination ports. The interconnect includes storage circuitry for storing the requests. Input circuitry receives the requests from the plurality of source ports, selects at least one selected source port from an allowed set of said plurality of source ports, and transfers a presented request from the at least one selected source port to the storage circuitry. Output circuitry causes a request in said storage circuitry to be output at one of said plurality of destination ports. Counter circuitry maintains counter values for a plurality of tracked ports from amongst said ports, each counter value indicating the number of requests in said storage circuitry associated with a corresponding tracked port that are waiting to be output by said output circuitry and filter circuitry determines whether or not a given source port is in said allowed set in dependence on said counter circuitry.

主权项

1. An interconnect to transfer requests between ports, the ports comprising a plurality of source ports and a plurality of destination ports, the interconnect comprising:
storage circuitry to store said requests; input circuitry to receive said requests from said plurality of source ports, to select at least one selected source port from an allowed set of said plurality of source ports, and to transfer a presented request from said at least one selected source port to said storage circuitry; output circuitry to cause a request in said storage circuitry to be output at one of said plurality of destination ports; counter circuitry to maintain counter values for a plurality of tracked ports from amongst said ports, each counter value indicating the number of requests in said storage circuitry associated with a corresponding tracked port that are waiting to be output by said output circuitry; and filter circuitry to determine whether or not a given source port is in said allowed set in dependence on said counter circuitry.