发明名称 |
METHOD TO CONTROLLABLY ETCH SILICON RECESS FOR ULTRA SHALLOW JUNCTIONS |
摘要 |
A method of forming a semiconductor device that includes forming a germanium including material on source and drain region portions of a silicon containing fin structure, and annealing to drive germanium into the source and drain region portions of the fin structure. The alloyed portions of fin structures composed of silicon and germanium are then removed using a selective etch. After the alloyed portions of the fin structures are removed, epitaxial source and drain regions are formed on the remaining portions of the fin structure. |
申请公布号 |
US2016197189(A1) |
申请公布日期 |
2016.07.07 |
申请号 |
US201615070584 |
申请日期 |
2016.03.15 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Cheng Kangguo;Doris Bruce B.;Hashemi Pouya;Khakifirooz Ali;Reznicek Alexander |
分类号 |
H01L29/78;H01L29/08;H01L29/165 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device comprising:
a gate structure present on a channel portion of a fin structure, the fin structure having a first cross section for the channel portion and a second cross section for the source and drain region portions of the fin structure; a spacer present on a sidewall of the gate structure, wherein a trench in the channel region portion of the fin structure extends beneath the spacer; and epitaxial source and drain region structures are present on the source and drain region portions of the fin structure, wherein a portion of the epitaxial source and drain region structures extends into the trench underlying the spacer. |
地址 |
Armonk NY US |