发明名称 DC LEVEL GENERATOR
摘要 PURPOSE: To obtain a DC level generating apparatus capable of reducing the number of sample and hold(SH) circuits per D/A converter by providing a plurality of SH circuits for charging DC levels, a voltage level power circuit for generating DC levels, and a controller for refreshing the voltage levels. CONSTITUTION: A controller 14 closes a switch 11, opens a switch 13, and closes the uppermost switch in a group of switches 9. The voltage of a capacitor 3 of the uppermost sample and hold circuit 2 is fed back to the inverted input terminal of an amplifier 6 through a resistor 7, and a capacitor 10 is charged to a voltage level equal to the voltage difference between the output voltage of a converter 5 and the terminal-to-terminal voltage of the capacitor 3. When the capacitor 10 is charged to an appropriate level, the switch 11 is opened, and the switch 13 is closed. Charges proportional to the voltage of the capacitor 10 are transferred to one of the uppermost capacitors out of a plurality of capacitors 3. Accordingly, the charges of the capacitor 3 are refreshed so that the terminal-to-terminal voltage of the capacitor may be equal to a voltage intended as an output from the converter 5.
申请公布号 JPH05209936(A) 申请公布日期 1993.08.20
申请号 JP19920165884 申请日期 1992.06.24
申请人 JIENRATSUDO LTD 发明人 RICHIYAADO PAI
分类号 G01R31/28;G05F1/46;G05F1/56;G11C27/02;H02J1/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址