发明名称 HIGH EFFICIENCY ENCODING DEVICE AND DECODING DEVICE
摘要 <p>PURPOSE:To reduce the number of samples for image data propagated by an error flag. CONSTITUTION:The compressed data (a dynamic range DR, a minimum value MIN and n code signals DT) of each block obtained after ADRC coding are packed in a sync block in each 8 bits (1 byte). The dynamic range DR and the minimum value MIN constituting additional data are arranged at first and the n code signals DT (3 bits) constituting a bit plane are successively packed so as to be crowded in the byte direction. Even when an error flag is set up in the packed part of the bit plane, an error flag consisting of 8 bits is propagated only to the image data of 4 samples or less.</p>
申请公布号 JPH06165143(A) 申请公布日期 1994.06.10
申请号 JP19920317139 申请日期 1992.11.26
申请人 SONY CORP 发明人 YADA ATSUO;NAKAYA HIDEO;HORISHI MASARU
分类号 H04N5/92;H04N7/24;H04N19/00;H04N19/46;H04N19/65;H04N19/70;H04N19/98;(IPC1-7):H04N7/13 主分类号 H04N5/92
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