发明名称 |
Memory read requests passing memory writes |
摘要 |
Memory read and write requests are received. The read is received in accordance with a communication protocol that has a transaction ordering rule in which a memory read cannot pass a memory write. The memory read and write requests are forwarded to the first device in accordance with another communication protocol that has a transaction ordering rule in which a memory read may pass a memory write. The forwarded memory read request is allowed to pass the forwarded memory write request whenever a relaxed ordering flag in the received read request is asserted. Other embodiments are also described and claimed.
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申请公布号 |
US2005289306(A1) |
申请公布日期 |
2005.12.29 |
申请号 |
US20040879778 |
申请日期 |
2004.06.28 |
申请人 |
MUTHRASANALLUR SRIDHAR;CRETA KENNETH C |
发明人 |
MUTHRASANALLUR SRIDHAR;CRETA KENNETH C. |
分类号 |
G06F12/00;(IPC1-7):G06F12/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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