| 摘要 |
PURPOSE:To improve operating margin, by applying a voltage which is changeable to almost a half the power supply voltage change to a cell plate of a memory cell, and cancelling a readout voltage change due to the power supply voltage change at write and read cycles. CONSTITUTION:A Vcc/2 generated in a constant voltage source integrated on a memory chip is applied as a voltage making a half change of a power supply voltage Vcc change to a cell plate 8. At time T1, write operation is done and a bit line is set to 0.4V corresponding to data ''0'', ''1''. At time T2, the write is finished and the memory voltage reaches 0.3V. At time T3, the Vcc voltage changes from 2V to 3V and the memory voltage reaches 1.4V. At time T4, the word line is high level and the word line is 6V the same as the Vc at readout, and the readout voltage goes to 120mV, which is independent of the Vcc change. Thus, malfunction can be avoided at readout for stable operation. |
