Bias circuit for a transistor in a memory cell.

摘要

The integrated circuit (1) has memory circuits (2) comprising floating grid (3) and isolating (4) transistors in series with a resistor (25) and potential source (Vcc). The memory circuits may constitute an open circuit or a resistance and ar polarised by a circuit (8) having a command signal (VBO) and output (VB). The polarising time constant may be reduced by introducing a second polarising circuit (9) which has two transistors (23,24) types P,N respectively in series to form an invertor. This second polarising circuit is placed in parallel with the first polarising circuit (8).