发明名称 FACSIMILE SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To make it possible to improve picture quality by emphasizing white in black by detecting white in black in terms of an input signal before a ternary return and by giving a maximum white level near its maximum point. CONSTITUTION:Output signal 17 of DFF7 is input to monostable circuit 8 that is held at leve [H] for time(t) determined by capacitor C and variable resistor RV4. Output 18 of the circuit 8 is input from its Q terminal to the control terminal of analog gate 10, and inverted output Q'' from output 18 is supplied to the control terminal of analog gate 9. Gate 9, when signal Q' appearing at the control terminal is at [H], transmits a facsimile signal to buffer 11 and cuts off it when [L]. Further, gate 10 transmits maximum white level Vw to buffer 11 when signal Q from the control terminal, i.e., signal 18 is at [H] and cuts off Vw when [L]. Therefore, facsimile signal 19 can be obtained as the output of buffer 11 at terminal OUT before a ternary return, and emphsis is so placed that this signal 19 will be at the maximum white level.
申请公布号 JPS564977(A) 申请公布日期 1981.01.19
申请号 JP19790079994 申请日期 1979.06.25
申请人 NIPPON ELECTRIC CO 发明人 HONMA TSUTOMU;MITSUOKA TAKASHI
分类号 H04N1/409;(IPC1-7):04N1/40 主分类号 H04N1/409
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